1. Field of the Invention
The present invention relates to a method for forming an isolation film for semiconductor devices, and more particularly to a method for forming an isolation film for semiconductor devices, which can prevent an active region from being attacked and to make a such a process simple.
2. Description of the Prior Art
With the advancement of semiconductor technologies, the high-speed operation and high-density integration of semiconductor devices is progressing rapidly, and at the same time, requirements for the minuteness of a pattern and the high precision of pattern size are being gradually increased. In addition to a pattern formed in the device region, such requirements are also applied to an isolation region occupying a relatively large area in a semiconductor substrate. This is because the width of an isolation region needs to be reduced so as to increase the width of a device region, according to a tendency where the width of the isolation region is reduced as the integration density of devices becomes higher.
An isolation film providing the isolation between semiconductor devices has been formed by a local oxidation of silicon (LOCOS) process. As well known in the art, however, the isolation film formed by the LOCOS process is disadvantageous in that a “bird's beak” is formed at the edge of the isolation film such that the area of the isolation film is increased, causing leakage current.
Thus, in a substitute for the method for forming the isolation film using the LOCOS process, there was proposed a method wherein an isolation film having reduced width and excellent isolation characteristics is formed using a shallow trench isolation (STI) process. Currently, in most of semiconductor devices, the isolation films are formed using the STI process.
Hereinafter, a method for forming an isolation film using the STI process will be described with reference to FIGS. 1A to 1E.
As shown in FIG. 1A, a pad oxide film 2 and a pad nitride film 3 are successively formed on a silicon substrate 1 having an active region and a field region. Then, a portion of the pad nitride film 3 and a portion of the pad oxide film 2 are successively etched to expose a portion of the substrate corresponding to the field region. Then, using the remaining portion of the pad nitride film 3 as an etch barrier, a portion of the substrate exposed through the etched portion of the pad nitride film 3 is etched to form a trench 4.
As shown in FIG. 1B, a buried oxide film 5, such as a high-density plasma (HDP) oxide film, is then deposited on the entire upper surface of the substrate 1 such that the trench 4 is completely filled with the buried oxide film 5.
As shown in FIG. 1C, a photoresist pattern 7 is then formed in such a manner as to cover a portion of the HDP oxide film filled in the trench.
As shown in FIG. 1D, a portion of the HDP oxide film on the active region, which was not covered with the photoresist pattern, is then etched. After removing the photoresist pattern, the HDP oxide film 5 is subjected to chemical mechanical polishing (CMP) such that the pad nitride film 3 is exposed.
As shown in FIG. 1E, the pad nitride film 3 used as the etch barrier in the trench etching is then removed. In this way, a trench type isolation film 5a is formed.
However, the prior method for forming the isolation film using the STI process has the following problems.
As shown in FIG. 1B, a portion of the HDP oxide film deposited on the field region is thicker than a portion of the HDP oxide film deposited on the active region. Thus, if CMP is conducted in this state, dishing can occur on the surface of the HDP oxide film filled in the trench so that the reliability of the isolation film cannot be ensured.
Thus, as shown in FIG. 1C, after depositing the HDP oxide film, the photoresist pattern is formed on the field region in such a manner as to cover the deposited HDP oxide film, and then, the exposed portion of the HDP oxide film on the active region is etched. In this case, however, plasma ions are concentrated on the edge A of a portion of the HDP oxide film to be etched, so that this edge is etched rapidly to cause a micro-trench.
Thus, as shown in FIG. 1D, the edge B of the pad nitride film is attacked due to the influence of the micro-trench when subjecting the HDP oxide film to CMP. Accordingly, as shown in FIG. 1E, the edge C of the active region adjacent to the trench is attacked upon removal of the pad nitride film.
As a result, a hump on the current-voltage curve and an inverse narrow width effect (INWE) caused by the reduction of threshold voltage according to the reduction of transistor width, etc, are caused, so that semiconductor devices operate abnormally and thus the reliability of the devices are not ensured.
In addition, in the prior method for forming the isolation film using the STI process, the steps of forming and removing the HDP oxide film are required for polarizing the HDP oxide film, thereby increasing the number of process steps.